The meanings of the parameters are as follows: i, isc compensates the excitation current in the winding; power winding current; upb, upc power winding phase voltage; u) diode rectifier bridge DC side output voltage; u - converter DC side capacitor voltage. The power electronic conversion device is composed of a power device, a driving circuit thereof and a control circuit. The power device uses Mitsubishi's intelligent power (75A/1200V), and the drive circuit uses optocoupler HCPL4502. The control circuit consists of DSP+FPGA. The interface circuit between the 2EPM7128 and the TMS320C32 and the peripheral device is shown as the interface circuit of the control circuit. The DSP used in the control circuit is TMS320C32, which is the third generation high-performance 32-bit digital signal processor produced by TI. It has become an ideal industrial control DSP with powerful instruction system, high-speed data processing capability and innovative structure. Device. Its main features are: single-cycle instruction execution time of 50ns, with the ability to execute 22 million instructions per second and perform 40 million floating-point operations; provide an enhanced external memory configuration interface for more flexible memory management and Data processing method. The FPGA device used in the control circuit is ALTERA's EPM7128, which is a high-density, high-performance CMOSEPLD development system software that can 100A simulate high-density TTL devices with various logic functions and multiple programmable logics. The use of a similar device as a DSP's dedicated peripheral integrated circuit (ASIC) is more economical and flexible, further reducing the cost of the control system. 34 voltage detection uses a three-phase transformer, and current detection uses an HL current sensor. A level shifting circuit is used to convert the detected signal to a level of 05V. The A/D converter selects the ADS7862. The protection circuit uses the voltage comparator 311 to obtain an overvoltage/overcurrent fault signal. The DSP performs the following four tasks: data acquisition and processing, completion of control algorithms, calculation of PWM pulse values, and processing of protection interrupts. The 6PGA performs the following three tasks: managing the interface of the DSP and various external devices; generating the pulse and the generation of the dead zone; and processing the protection signal. 3 Using FPGA to achieve high-speed ADS7862 between DSP and ADS7862 is TI's A/D converter designed for motor and power system control. Its main features are: 4 fully differential input interfaces, which can be divided into two groups, two channels can be converted simultaneously; 1"; <=> parallel output; the conversion rate of each channel is 500kHz. The control method is: by A0 line The value determines which two channels are converted; the transition is initiated by a low-level pulse with a pulse width greater than 250c> on the Conv>t line; the readout of the low-level control data by the CS and RD lines can be obtained by reading the signal twice in succession. Data for both channels. Two ADS7862s are used in the system. Their control lines use the same interface, and the data lines are connected to the lower 12 bits of the DSP's high/low 16-bit data lines. In this way, the DSP can simultaneously control two A/D turns, where 0 means low level and 1 means high level. RW = 1 for reading and RW = 0 for AND. The DSP can control the A/D converter by operating these three ports: writing the CONVST port can start the A/D converter; reading the ADCS port can read the data from the A/D converter; writing data to the A0 port can be set. Different channels. Using the above method, a seamless and fast connection between the DSP and the A/D converter can be achieved. 4 using FPGA to achieve P7M pulse generation and dead zone injection 6PGA in addition to managing the interface of the DSP and peripherals, but also complete the PWM pulse generation and dead zone injection. use
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